Xilinx

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The Xilinx tool chain is still not well supported by the Makefile or the Ant design flow. Here a short list how to build JOP for a Xilinx board: 

 make tools
 cd asm
 jopser
 cd ..

Now start the Xilinx IDE on the project file jop.npl. It will be converted to a new (binary) jop.ise project. The .npl is still used as it is simple to edit (ASCII).

  • Generate JOP by double clicking 'Generate PROM, ACE, or JTAG File'
  • Configure the FPGA according to your board type

The above is a one step build for the processor. The Java application is built and downloaded by: 

 make java_app
 make download

Contents

[edit] Ant

The Ant version is 

 ant tools
 cd asm
 ant -f jopser.xml
 cd ..

same as above 

 ant java-app
 ant download

[edit] About Xilinx starter kits

the current release of Jop is designed for a xilinx spartan 3 starter kit (the one with xc3s200 fpga and sram memory) and works perfectly.

For a while, Xilinx (and Digilentinc) provides two new boards for with spartan fpga :

  • spartan 3E starter kit : xc3s500e and DDR SDRAM
  • spartan 3A starter kit : xc3s700a and DDR2 SDRAM

there is no reason that these board couldn't be reference design for jop too. The main work is to port ddr ram controller. Xilinx provides for free these controller (with coregen/mig1.7 utility).

[edit] Digilent nexys2 Spartan-3E board

The Xilinx IDE project is found in xilinx/nexys2. If you're using the USB cable to download the configuration you have to use digilents download software.

The port was easy as the board contains a PSDRAM that can be used as it would be a simple, slow SRAM.

[edit] Makefile

The Xilinx flow should be integrated into the Makefile. Perhaps following string will help: 

 ise -intstyle ise -dd _ngo -nt timestamp -uc jop.ucf -p xc3s200-ft256-5 jop.ngc jop.ngd
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