User:DanClemmensen/Current
From JopWiki
This is my current running progress log. Earlier activity is archived.
Contents |
[edit] JOP Project, 2008-03-16
- ISE Webpack: installed and working
- GHDL and GTKView installed and working
- Spartan 3E kit: cabled up and programmable via USB
- DDR SDRAM driver: working in standalone test
- JOP project installed and working on Linux
- JOP partially adapted for Spartan 3E
- makefiles working
- jvm.asm reduced to below 1K words
- SPI and HID primitive peripherals working
- Bytecode bootloader working
- Method extractor working
- Xblockgen templates working
- Trivial test app ("hello jop world")written
- All Xilinx tools running in batch mode, so make is fully automated.
- TODO:
- add the bytecode application to the PROM image
- integrate the DDR SDRAM interface
- write a fast SPI peripheral.
Later major goals:
- integrate the Ethernet MAC
- write the "OS" application
- write the STM application
- Development environment enhancements
- Eclipse
- VHDL2SVG "schematic" documentation
- JOP enhancements
- remove offtbl
- remove jtbl
- shorten pipeline?
[edit] JSTM Architecture
The JSTM is an STM controller based on JOP and running on a Spartan 3E starter kit. The interface to the STM hardware will be via the ADCs and DACs on the board and on some digital signals to drive the stepper motor for coarse positioning. The interface to the rest of the world is via TCP/IP over ethernet.
To support this, we will first get a standalone minimal JOP running. We will then add additional modules until we have a full-up JOP system. Finally we will add the STM.
If the ethernet is too hard to implement, we will revert to USB, but this is a multi-step process because it means switching to Xup. If we switch to Xup, we will first need a Xup flash programmer (or something) to permit easy switching of USB between programming and normal use.
- define off-board interface.
- design off-board STM circuit.
- build off-board STM circuit and connectors.
- create the FPGA drivers for the STM.
- wire up the STM
- write the JAVA to run the STM and send frames to Linux
- design a custom STM board to replace the devel board.
[edit] JOPM Optimization
The JOP microcode uses a 10-bit word. The Spartan 3E FPGA uses a BRAM with a hardware size of 1,2,4,8,9,16,18,32,or 36 bits. The 10-bit word is just about the worst possible size.
Of the ten bits, two of the bits are dedicated: nxt and opd. These bits have several interesting characteristics: they are never both set at the same time, and neither bit is set for a BZ or BNZ.
On a different note, we can add 8 bits to every instruction. If we can get the pipeline to not stall, we use the bits as branch bits. by allocating location 0 as "nxt" we get one more bit. This eliminates the offtbl.
To eliminate the jtbl, Java bytecodes will immediately jump to their own offsets (0-255) in the JOPM. each instruction will have a "next" addr, which is either zero or the next relative instruction. the next relative instruction is either in the next page or the previous page, where a "page" is 256 instruction words: there are a total of 4 pages of microcode (1024 instructions.) A bz/bnz is different: it branches to any pair of locations. The instruction branches to the even word if the pair of the condition is zero and to the odd location if the condition is non-zero. This means that the current 64 branch instructions are reduced to 1 , and we have 63 extra instructions to use. If this reduces the instruction count below 128, we may recover an additional bit, which extends the jump address to ten bits and removes the restriction.
[edit] Log
- 2008-03-16: built target with DDR: will not load due to timing problems.
- 2008-03-17: rebuilt and reloaded. DDR does not yet work, but at least the rest of system now works. Next step: run in simulation.
- 2008-03-19: I broke my Gentoo. This happens about once every 3 months and takes from ten minutes to one day to fix. This one looks like a one-day fix. My Gentoo is more fragile than most because I'm using a compiz overlay. Anyway, I cannot make progress on the DDR until I fix this. I intend to upgrade to a New Linux version while I'm in maintenance mode, and add a driver for my new USB serial port cable. This will let me validate the JOP serial port system in addition to my more exotic Flash-only download scheme.
