JOP starter kit

From JopWiki

Collecting ideas and information about a new FPGA board

Contents 1 Goals 2 Compatibility 3 Additional Requests 4 Default Configuration 5 Design Considerations 5.1 Watchdog 5.2 LEDs 5.3 FTDI chip 5.4 Reset 5.5 Serial Configuration Flash 5.6 Power Supply 6 Configuration 7 Components 7.1 FPGA 7.2 Memory 7.2.1 available 7.2.2 not available at the moment 7.3 Power supply 7.4 USB connection 7.5 Capacitors 8 BOM

[edit] Goals

• Simple and cheap FPGA platform for JOP
• Compatible with Cycore
• USB only usage possible (no additional power supply)
• Large memory
• SD-card for big Flash
• Less than EUR 100,-

[edit] Compatibility

To leverage the many extension boards that are available for the Cycore board the pinout shall be compatible.

• Serial line interface
• Additional pins in inner row

[edit] Additional Requests

• LVDS channels
• protected IO pins
• Large FPGA possible
• Non BGA packages ( better for DIY PCB ) - it's not intended to be a DIY board ;-) Martin 08:52, 15 October 2007 (CDT)

Shall we integrate wireless on the board?

[edit] Default Configuration

The default configuration should be an easy to use solution for JOP programming and not for FPGA development.

• WD toggle in HW
• Do a nice blinking pattern
• Expect a new Java program for download
  • Load into memory and execute it
• Reset button for new download
• Overwrite of FPGA configuration via USB

[edit] Design Considerations

[edit] Watchdog

The Cycore board contains an external watchdog (WD) that will trigger reload of the FPGA configuration when not toggled once every 1.6 s. With this feature it is also possible to restart the board with a new configuration in the field without user intervention: update the Flash and just stop toggling the WD pin. This feature is important for some projects and needs to be implemented in the new board.

Two solutions are possible:

• Keep the external WD chip and provide a HW toggle solution for a

default configuration. Pro: the WD chip is probably more reliable to detect the power up.

• Move the WD functionality into the FPGA. In that case one FPGA

outp ut pin has to be routed to config start.

[edit] LEDs

Following LEDs should be on the board:

• WD red
• power ok green
• one user LED

Use smaller LEDs (0805 or even smaller) to save space.

[edit] FTDI chip

A new FTDI chip (newer than the one used in the dspio or LEGO board) is available. The new chip also provides a JTAG mode. However, the SW has to be adapted and it's not clear if the parallel mode for user communication can than still be used. A quick prototype board should be built.

Shall we use a smaller package?

We have to adapt USB Runner. Do we need a nice Windows GUI application as frontend for the download?

The solution is not a plug-in replacement for the Altera USB-Blaster (would be nice, but Altera provides not enough information on the SW part of the download). Therefore the standard way to program a Flash with NIOS from Quartus is not possible. We need to provide a tool (and description) to program the Flash. (Well, it appears there is an open source USB-Blaster compatible alternative: http://www.fpga4fun.com/forum/viewtopic.php?t=483).

An alternative to the FTDI chip is a small microcontroller (cypress?). We could include the JTAG pin toggling in the microcontroller and the configuration would be probably faster.

[edit] Reset

For easy Java program download the JSK will be available preprogrammed (FPGA + Java app). The preprogrammed Java application will listen after boot on the USB channel to download a user Java application. To restart the board either a reset button (goes to FPGA start config?) or a reset line from the USB chip is necessary.

[edit] Serial Configuration Flash

The Flash should be programmed via the FPGA. This is possible with NIOS and Quartus. We have to check how to do it with JOP. A check with the Altera Cyclon-3 board could help.

• serial device has to work at 40 MHz. Does the ST device support this? Older Altera devices did not support 40 MHz.
• A series 25R is needed near serial dout (DATA[0])

[edit] Power Supply

The board can be powered by USB or via pin 1. The selection can not be done automatically and we need a solder jumper. When powered by pin 1 USB has still to work.

Can we power external devices on pin 1 when configured for USB power? Better not as it can come to a clash. Better use an additional pin to provide the USB power for USB powered extension boards.

[edit] Configuration

The FPGA should be configured in AS mode via a serial Flash and in JTAG mode via USB to override the Flash configuration. The issue is how the Flash can be in-system programmed with our USB chip for JTAG. Altera supports only their JTAG cables for indirect Flash programming.

Another option is to use PS mode to configure the FPGA via USB and AS for the serial Flash. That would need to change the MSEL pins!

We could also try to program the serial Flash directly via the USB chip. See datasheet for the wires and additional diodes necessary. That would also need tri-state function on the USB pins - not a good idea.

[edit] Components

[edit] FPGA

Cyclone III in different sizes

• EP3C25 in 144 pin QFP for the prototype
• EP3Cxx in BGA for the final version

[edit] Memory

[edit] available

• Serial Flash for FPGA configuration and Java program
  • M25P16-VME6G, Farnell 1099664, EUR 3,20
  • M25P16-VME6P, Farnell 8661316, EUR 3,90
• 32 bit SDRAM:
  • MT48LC2M32B2P 64 MB, EUR 1.83
  • MT48LC4M32B2P-6 128 MB, EUR 4.22
• SD-card for Flash file system
  • Farnell 9186166 (should be the same pinout as on dspio board - to check) EUR 0.82

[edit] not available at the moment

• SDRAM for main memory (the Altera SDRAM controller is free)
• 16 bit:
  • MT48LC4M16A2P-7E 8 MB for EUR 1.54 @100
  • MT48LC8M16A2TG 16 MB for EUR 2.88 @100
  • MT48LC16M16A2P-75 32 MB for EUR 4.13 @100
  • MT48LC32M16A2TG-75 64 MB for EUR 13.64 @100
• or PSRAM:
  • MT45W8MW16BGX 16 MB for EUR 4.6 @100
• or SSRAM (like on the DE2-70 Board):
  • IS61LF12836A-7.5TQI 4M(128K x 36) for EUR 6.32 @72 Digikey
  • IS61LPS25636A-200TQI 8M (256K x 36) for EUR 12.00 @72
  • IS61LF51236A-7.5TQI 18M (512K x 36) for EUR 17.69 @72

[edit] Power supply

FPGA supply voltages:

• VCCINT 1.2V
• VCCIO 3.3V (for SDRAM?)
• VCCA 2.5V

Possible parts (available) for 3V3 and 1V2:

• LTC3548 dual 800/400 mA, 10 pins (3x3 mm2), $3.71
  • in EMSE or EDD package
• LTC3561 single 1A, 8 pins (3x3 mm2), $3.57
• LTC3411 single 1.25A, (3x3 mm2), $3.78
  • in EMS or EDD package
• LT1962EMS8-3.3 300mA LDO - perhaps too less for the SDRAM?
• LTC3405AES6-1.5 300mA step down 1V5

Simple linear for 2V5 (good for the PLL):

• LT1761ES5-2.5#TRMPBF 100mA linear, SOT23, $1

not available:

not so good:

• TPS54312 single 3A
• TPS62410 dual 800mA (3x3 mm2) $5.80

Don't forget regulator from USB to 3.3V. SDRAM 170mA operating, 300+ mA auto refresh, 1W

• LT1962EMS8-3.3#PBF, 300mA, $2

Another option:

• LTC3455 - used in Arrow low-power reference design

[edit] USB connection

FPGA configuration and Java program download via USB (actual FTDI chip that does need less external components)

Small USB connector:

• Farnell 1125348 EUR 0.62 (if possible)
• Farnell 1125349 EUR 2.70 (too expensive)

[edit] Capacitors

• Change to 0603 for better spacing and better EMC

[edit] BOM

Check Availability of used components: Farnell, RS, Digikey!!!

• serial Flash: e.g. M25P16 (or smaller) in 16-SOIC, an EP3C25 needs uncompressed 6.5 MBit

All prices are for 100 pcs. We need to keep the part cost way below EUR 50.- to achieve a board price of EUR 99.- with full production (PCB, setup cost, production cost).

Part	Type	Price (EUR)	Comment	Source
FPGA	EP3C5	12.00	also larger parts (EP3C25) in same pinout	Altera
Configuration Flash	M25P16	2.30	16-SOIC is easier to get	Digikey datasheet
Memory	MT48LC2M32B2P	4.60		Digikey
USB chip	FT2232D	4.30		http://www.ftdichip.com/Products/FT2232C.htm
USB connector	Farnell 1125348	x.00	small
Watchdog	MAX823SEUK komp.	1.83
RS232	MAX3232CSE	1.00
Power regulation
SD-card connector		1.20