FAQ
From JopWiki
Contents |
[edit] VHDL files are missing when synthesizing JOP on Quartus or ISE
Some VHDL files are generated from the microcode that implements the JVM. Therefore you have to perform additional steps in the build process. See Getting started and Xilinx.
[edit] How can System.in be used with an USB connection?
java.lang.System.in and java.lang.System.out use the special streams java.io.JOPInputStream and java.io.JOPOutputStream. System.out is routed to the serial line and to the USB device. However, System.in has to block on a read operation and therefore uses only one device. The default is the serial line and can be changed in java.io.JOPInputStream.
[edit] How to use the Flash on the Cycore board?
A small Java program is available to erase, program, and read the 8-bit Flash: util.Amd.
[edit] I get stack overflows
JOP has a limited on-chip RAM for the stack. Therefore, try to reduce the call depth of your application. If this does not help the size of the on-chip stack cache can be increased. Following constants have to be changed:
- RAM_LEN in com.jopdesign.sys.Jopa
- STACK_SIZE in com.jopdesign.sys.Const
For 'make jsim' to a maximum of 68265, default value is 256.
- ram_width in jop_config_xx.vhd
For 'make sim' using ModelSim, default value is 8. This value must correlate with the correct RAM_LEN and STACK_SIZE java file constants. E.g. 1024 = 2 ^ 10, 2K = 2 ^ 11, etc.
For ModelSim hardware simulation, a full 'make all' is recommended to recompile JOP with the changes. For a soft JOP simulation, only rebuilding the tools using 'make tools' is required.
